1. Field of the Invention
The present invention relates to a method for manufacturing a multi-layer printed circuit board. More specifically, the present invention relates to a build-up type multi-layer printed circuit board, in which the method of forming a hole in a circuit layer and the method of forming a hole in an insulating layer are made different from each other by applying a combined formation method, thereby improving the formation precision and efficiency in forming the holes.
2. Description of the Prior Art
The build-up type multi-layer printed circuit board can be manufactured in various ways. Generally, the method can be carried out in the following manner as shown in FIG. 1, wherein a printed circuit pattern 12 is formed by applying a photoetching process on both faces of a copper clad laminate (to be called `CCL` below) 11 with copper films coated on both faces thereof. Thus an internal circuit is formed. On the CCL 11 with internal circuits formed thereon, there is stacked a resin-coated copper foil (to be called `RCC` below) 13 with a resin film coated on one face thereof. Via holes 15 are formed in the structure, and then electroless plating is preformed. Thereafter, the plated board is subjected to the formation of a pattern 14 by applying a photoetching process, thereby forming an external circuit layer. Finally, photoresist is spread on the pattern.
The method for manufacturing the multi-layer printed circuit board using the RCC as described above is classified into two types based on the method of forming the via hole. One type is that in which the via hole is formed by a chemical etching method. Another is that in which the via hole is formed by laser beams. Recently, the laser beam method is more widely used.
In the conventional method for manufacturing the multi-layer printed circuit board by using laser beams, excimer lasers are mostly used. However, if the excimer laser is used, an image hole mask has to be used on the organic-film-coated copper foil so as to prevent the scattering of beams, this being a disadvantage. Particularly, if the FR-4 material is used instead of the organic film, the excimer laser cannot form the hole. Therefore, the selection of the insulating layer is limited, and the hole can be formed only down to a certain depth. Thus the freedom of formation is low, with the result that the density of the board is aggravated. In order to dissipate the disadvantages of the use of the excimer laser, the present inventors have invented a method for manufacturing a multi-layer printed circuit board by using a YAG laser (yttrium aluminum garnet laser), and have filed a patent application under Korean Patent Application Laid-open No. 98-7902.
As shown in FIG. 2a, this method is constituted as follows. That is, a printed circuit pattern 22 is formed on a CCL 21 by applying a photoetching process, and then, an RCC 23 is stacked on the patterned board. Then this structure is heated and pressed. Then the board with the RCC 23 stacked thereon is subjected to the formation of a via hole 25 by using a YAG laser. When an excimer laser is used, the excimer laser cannot drill the copper foil. Therefore, first the copper foil of the RCC is removed by an etching, and then, the via hole is drilled through the insulating layer. However, the YAG laser can drill a via hole even into the copper foil, and therefore, a pre-step of removing the copper foil is not required, this being an advantage. That is, if the YAG laser is used, a via hole 25 can be directly drilled into the insulating layer 23b without removing the copper foil 23a of the RCC 23. After the formation of the via hole by using the YAG laser, the board 20 is subjected to further process steps as shown in FIG. 2b. That is, in order to achieve an inter-layer connection, an electroless copper plating is carried out to plate the inside of the via hole 15. Then a Cu electroplating is carried out to form a plated layer 26, thereby making the inside of the via hole 25 conductive. Then finally, the usual exposure and development are carried out on the copper foil 3a of the RCC to form a circuit pattern, and then, a photoresist layer is formed, thereby completing the manufacturing process.
According to the above described Korean Patent Application Laid-open No. 98-7902, the via hole formation precision is improved, and the manufacturing process is simplified very much. However, the YAG laser is capable of drilling not only the copper foil 23a of the RCC 23 but also the insulating resin layer 23b. Therefore, as shown in FIG. 3a, damages may occur at an end point 22a of the pattern 22. In this case, even if an electroless plating is carried out, the inter-pattern connections become imperfect as shown in FIG. 3b. Further, in order to increase the density of the circuit board, in the case where the pattern 22 of the CCL 21 is made thin, or in the case where the insulating layer 23b of the RCC is made thin, if an intensity variation of the laser beams occurs, the pattern 22 of the CCL may be totally etched away as shown in FIG. 4a. In this case, as shown in FIG. 4b, a plated layer 26 is formed in a thickness of about 25 .mu.m, and as shown in FIG. 4c, a photoresist layer of about 10 .mu.m is formed. In this case, if the plated layer 26 is imperfect, the etching solution can attack the plated layer during an alkali etching to break the circuit connection at the portion A. Of course, the method using the YAG laser has advantages in that the formation precision of the via hole is improved, and that the manufacturing process becomes simple. In spite of these advantages, there are latent the reliability problems such as the circuit breaking or the like.
Further, when the via hole is drilled only by the YAG laser, if the via hole is to be densely formed, parts of the insulating resin layer 23b and the copper foil 23a are drilled based on a spiral step. Then a second step based on a Trepan step is carried out to remove the residual resin, and therefore, the drilling efficiency is aggravated. Besides, the insulating resin layer adheres on the copper foil layer, and the copper foil and the insulating resin layer are heterogenous each other. Therefore, the YAG laser is extremely inefficient in drilling the via hole. For example, when an Nd-YAG laser drills a via hole into a board with an RCC stacked thereon as shown in FIG. 2a, the drilling speed is barely 25 holes per second.
In an attempt to overcome these disadvantages, Japanese Patent Laid-open No. Hei-8-279678 proposes the following method. That is, only the copper foil is selectively removed, and the insulating layer is drilled by using a CO.sub.2 laser. That is, as shown in FIGS. 5a to 5e, a copper foil 33a and a prepreg 33b which is made of a glass fiber are stacked on a CCL 31 with welding pads placed thereon. This structure is heated and pressed to harden the prepreg 33b. Then only the copper foil 33a corresponding to the welding pad is removed by etching, and then a via hole 35 is drilled into the hardened prepreg 33b by using a CO.sub.2 laser. Then a conductive material is coated on the via hole 35.
This CO.sub.2 laser method shows a high speed compared with the YAG laser method. However, the insulating layer is the prepreg composed of a glass fiber, and therefore, the control of the laser beams is difficult depending on the place where the glass fiber lies and the place where the glass fiber does not lie. That is, if the intensity of the laser beams of the CO.sub.2 laser is made constant, the shapes of the via holes are not uniform, but the via hole may become convex like a bell as shown in FIG. 6a. Therefore, if an electroless plating is carried out on the via hole, the pad layer may be disconnected due to the thermal impact.
Another problem of this method is as follows. That is, the copper foil is removed by an etching, and therefore, the formation of a hole of less than 100 .mu.m becomes difficult due to the inherent nature of etching. Not only that, but if a mismatch occurs in removing the copper foil, the shape of the via hole is deformed as shown in FIG. 6b, with the result that the reliability of the inter-layer connection is aggravated.